1. Field of the Invention
The present invention relates to an improvement of semiconductor devices for high voltages, particularly of power devices in MOS technology. More particularly the invention relates to an improvement of edge termination of said devices with a resistive voltage divider.
2. Discussion of the Related Art
The main problem of the raggedness of power devices in MOS technology at high voltages lies essentially in the breakdown voltage of the MOS devices. The phenomenon of the MOS devices"" breakdown lies essentially in the less resistive region, which is in the edge of the junction between the body pocket and the underlying drain layer. In fact the equipotential lines of the electric field thicken in the aforesaid zone causing the breakdown of the device at a lower voltage than the theoretical breakdown voltage.
A typical technology to improve such behavior of power devices in MOS technology consists in the deposition of a metal layer, in a step like structure (the metal is first deposited over a thin oxide, then over a thicker oxide), in correspondence to the device""s periphery, in order to avoid the thickening of the electric field""s lines at the edge of the junction between the body pocket and the underlying drain layer.
The more recent prior art presents a particular manufacturing of the power device in MOS technology, wherein besides the double step metallization over a thin oxide layer and a double layer formed by oxide and polysilicon, a guard-ring is added. Such a ring is constituted by a P+ pocket where before a thick field oxide layer is placed and then a silox layer is placed, where the silox is a insulating material, usually silicon dioxide doped by phosphorus. The aim of this multi-layer of silicon oxide, polysilicon, silox and aluminium is to make a bridge structure which widens the electric field lines of the device""s body. The polysilicon is connected or capacitively coupled with the aluminium layer. The silox layer serves to prevent the polarization of the layers under influence of lateral high fields through the device""s surface. The use of the P+ pocket serves to planarize the electric field""s lines; in fact the P+ pocket has a conductivity opposite to the N- epitaxial layer wherein it is formed in order to allow an extension of the electric field lines in parallel to the device""s surface.
The use of the field-plates with a guard-ring presents a limit for the high operating voltage the device is submitted to.
In view of the state of the art described, it is an object of the present invention to provide a technology for manufacturing a semiconductor device with an edge termination which allows the semiconductor device to resist to the high operating voltages it is submitted to.
According to the present invention, these and other objects are attained by a semiconductor device for high voltages comprising at least one power component and at least one edge termination, wherein said edge termination comprises a voltage divider including a plurality of MOS transistors in series, and said edge termination being connected between non-driveble terminals of said power component.
Thanks to the present invention it is possible to form a semiconductor device for high voltages allowing to obtain, thanks to existence of a voltage divider, a higher breakdown voltage.